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Pietro Babighian Vis

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*2007
7EEPietro Babighian, Gila Kamhi, Moshe Y. Vardi: Interactive presentation: PowerQuest: trace driven data mining for power optimization. DATE 2007: 1078-1083
2006
6EEPietro Babighian, Luca Benini, Alberto Macii, Enrico Macii: Enabling fine-grain leakage management by voltage anchor insertion. DATE 2006: 868-873
2005
5EEPietro Babighian, Luca Benini, Alberto Macii, Enrico Macii: Low-overhead state-retaining elements for low-leakage MTCMOS design. ACM Great Lakes Symposium on VLSI 2005: 367-370
4EEPietro Babighian, Luca Benini, Enrico Macii: A scalable algorithm for RTL insertion of gated clocks based on ODCs computation. IEEE Trans. on CAD of Integrated Circuits and Systems 24(1): 29-42 (2005)
2004
3EEPietro Babighian, Luca Benini, Enrico Macii: A Scalable ODC-Based Algorithm for RTL Insertion of Gated Clocks. DATE 2004: 500-505
2EEPietro Babighian, Luca Benini, Enrico Macii: Sizing and Characterization of Leakage-Control Cells for Layout-Aware Distributed Power-Gating. DATE 2004: 720-723
1EEPietro Babighian, Luca Benini, Alberto Macii, Enrico Macii: Post-layout leakage power minimization based on distributed sleep transistor insertion. ISLPED 2004: 138-143

Coauthor Index

1Luca Benini [1] [2] [3] [4] [5] [6]
2Gila Kamhi [7]
3Alberto Macii [1] [5] [6]
4Enrico Macii [1] [2] [3] [4] [5] [6]
5Moshe Y. Vardi [7]

Copyright © Tue Nov 3 08:52:44 2009 by Michael Ley (ley@uni-trier.de)