Bevan M. Baas Vis

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8EEWayne H. Cheng, Bevan M. Baas: Dynamic voltage and frequency scaling circuits with two supply voltages. ISCAS 2008: 1236-1239
7EEZhiyi Yu, Bevan M. Baas: A low-area interconnect architecture for chip multiprocessors. ISCAS 2008: 2857-2860
6EEZhiyi Yu, Michael J. Meeuwsen, Ryan W. Apperson, Omar Sattari, Michael A. Lai, Jeremy W. Webb, Eric W. Work, Tinoosh Mohsenin, Bevan M. Baas: Architecture and Evaluation of an Asynchronous Array of Simple Processors. Signal Processing Systems 53(3): 243-259 (2008)
5EEBevan M. Baas, Zhiyi Yu, Michael J. Meeuwsen, Omar Sattari, Ryan W. Apperson, Eric W. Work, Jeremy W. Webb, Michael A. Lai, Tinoosh Mohsenin, Dean Truong, Jason Cheung: AsAP: A Fine-Grained Many-Core Platform for DSP Applications. IEEE Micro 27(2): 34-45 (2007)
4EERyan W. Apperson, Zhiyi Yu, Michael J. Meeuwsen, Tinoosh Mohsenin, Bevan M. Baas: A Scalable Dual-Clock FIFO for Data Transfers Between Arbitrary and Haltable Clock Domains. IEEE Trans. VLSI Syst. 15(10): 1125-1134 (2007)
3EEZhiyi Yu, Bevan M. Baas: Implementing Tile-based Chip Multiprocessors with GALS Clocking Styles. ICCD 2006
2EETinoosh Mohsenin, Bevan M. Baas: Split-Row: A Reduced Complexity, High Throughput LDPC Decoder Architecture. ICCD 2006
1EEZhiyi Yu, Bevan M. Baas: Performance and Power Analysis of Globally Asynchronous Locally Synchronous Multi-Processor Systems. ISVLSI 2006: 378-383

Coauthor Index

1Ryan W. Apperson [4] [5] [6]
2Wayne H. Cheng [8]
3Jason Cheung [5]
4Michael A. Lai [5] [6]
5Michael J. Meeuwsen [4] [5] [6]
6Tinoosh Mohsenin [2] [4] [5] [6]
7Omar Sattari [5] [6]
8Dean Truong [5]
9Jeremy W. Webb [5] [6]
10Eric W. Work [5] [6]
11Zhiyi Yu [1] [3] [4] [5] [6] [7]

Colors in the list of coauthors

Copyright © Tue Nov 3 08:52:44 2009 by Michael Ley (ley@uni-trier.de)