Arnaldo Azevedo Vis

*	2009
13	EE	Arnaldo Azevedo, Cor Meenderinck, Ben H. H. Juurlink, Andrei Terechko, Jan Hoogerbrugge, Mauricio Alvarez, Alex Ramírez: Parallel H.264 Decoding on an Embedded Multicore Processor. HiPEAC 2009: 404-418
	2008
12	EE	Roberto Giorgi, Zdravko Popovic, Nikola Puzovic, Arnaldo Azevedo, Ben H. H. Juurlink: Analyzing Scalability of Deblocking Filter of H.264 via TLP Exploitation in a New Many-Core Architecture. DSD 2008: 189-194
11	EE	Arnaldo Azevedo, Cor Meenderinck, Ben H. H. Juurlink, Mauricio Alvarez, Alex Ramírez: Analysis of video filtering on the cell processor. ISCAS 2008: 488-491
	2007
10	EE	Vagner S. Rosa, Wagston T. Staehler, Arnaldo Azevedo, Bruno Zatt, Roger Endrigo Carvalho Porto, Luciano Volcan Agostini, Sergio Bampi, Altamiro Amadeu Susin: FPGA Prototyping Strategy for a H.264/AVC Video Decoder. IEEE International Workshop on Rapid System Prototyping 2007: 174-180
9	EE	Arnaldo Azevedo, Bruno Zatt, Luciano Volcan Agostini, Sergio Bampi: MoCHA: a Bi-Predictive Motion Compensation Hardware for H.264/AVC Decoder Targeting HDTV. ISCAS 2007: 1617-1620
8	EE	Bruno Zatt, Arnaldo Azevedo, Luciano Volcan Agostini, Altamiro Amadeu Susin, Sergio Bampi: Memory Hierarchy Targeting Bi-Predictive Motion Compensation for H.264/AVC Decoder. ISVLSI 2007: 445-446
	2006
7	EE	Luciano Volcan Agostini, Arnaldo Azevedo, Vagner S. Rosa, Eduardo A. Berriel, Tatiana Gadelha Serra dos Santos, Sergio Bampi, Altamiro Amadeu Susin: FPGA Design of A H.264/AVC Main Profile Decoder for HDTV. FPL 2006: 1-6
6	EE	Arnaldo Azevedo, Bruno Zatt, Luciano Volcan Agostini, Sergio Bampi: Motion Compensation Decoder Architecture for H.264/AVC Main Profile Targeting HDTV. VLSI-SoC 2006: 52-57
	2005
5	EE	Arnaldo Azevedo, Luciano Volcan Agostini, Flávio Rech Wagner, Sergio Bampi: Accelerating a Multiprocessor Reconfigurable Architecture with Pipelined VLIW Units. IEEE International Workshop on Rapid System Prototyping 2005: 255-257
	2004
4	EE	Rodrigo Soares, Ivan Saraiva Silva, Arnaldo Azevedo: When reconfigurable architecture meets network-on-chip. SBCCI 2004: 216-221
	2003
3	EE	Rodrigo Soares, Arnaldo Azevedo, Ivan Saraiva Silva: X4CP32: A Coarse Grain General Purpose Reconfigurable Microprocessor. IPDPS 2003: 171
2	EE	Rodrigo Soares, Arnaldo Azevedo, Ivan Saraiva Silva: X4CP32: A New Parallel/Reconfigurable General-Purpose Processor. SBAC-PAD 2003: 260-268
1	EE	Arnaldo Azevedo, Rodrigo Soares, Ivan Saraiva Silva: A New Hybrid Parallel/Reconfigurable Architecture: The X4CP32. SBCCI 2003: 225-230

Coauthor Index

1	Luciano Volcan Agostini	[5] [6] [7] [8] [9] [10]
2	Mauricio Alvarez	[11] [13]
3	Sergio Bampi	[5] [6] [7] [8] [9] [10]
4	Eduardo A. Berriel	[7]
5	Roberto Giorgi	[12]
6	Jan Hoogerbrugge	[13]
7	Ben H. H. Juurlink	[11] [12] [13]
8	Cor Meenderinck	[11] [13]
9	Zdravko Popovic	[12]
10	Roger Endrigo Carvalho Porto	[10]
11	Nikola Puzovic	[12]
12	Alex Ramírez	[11] [13]
13	Vagner S. Rosa	[7] [10]
14	Tatiana Gadelha Serra dos Santos	[7]
15	Ivan Saraiva Silva	[1] [2] [3] [4]
16	Rodrigo Soares	[1] [2] [3] [4]
17	Wagston T. Staehler	[10]
18	Altamiro Amadeu Susin	[7] [8] [10]
19	Andrei Terechko	[13]
20	Flávio Rech Wagner	[5]
21	Bruno Zatt	[6] [8] [9] [10]

Colors in the list of coauthors