William C. Athas Vis

*	2003
17	EE	Joong-Seok Moon, William C. Athas, Sigfrid D. Soli, Jeffrey T. Draper, Peter A. Beerel: Voltage-pulse driven harmonic resonant rail drivers for low-power applications. IEEE Trans. VLSI Syst. 11(5): 762-777 (2003)
	2002
16	EE	William C. Athas, Lynn Youngs, Andrew Reinhart: Compact models for estimating microprocessor frequency and power. ISLPED 2002: 313-318
	2001
15	EE	Joong-Seok Moon, William C. Athas, Peter A. Beerel: Theory and practical implementation of harmonic resonant rail driver. ISLPED 2001: 153-158
	2000
14	EE	William C. Athas: Practical considerations of clock-powered logic. ISLPED 2000: 173-178
	1999
13	EE	Nestoras Tzartzanis, William C. Athas: Clock-Powered CMOS: A Hybrid Adiabatic Logic Style for Energy-Efficient Computing. ARVLSI 1999: 137-153
12	EE	Nestoras Tzartzanis, William C. Athas: Retractile clock-powered logic. ISLPED 1999: 18-23
	1997
11	EE	William C. Athas, Nestoras Tzartzanis, Lars J. Svensson, Lena Peterson, Huimin Li, Xing Yu Jiang, Peiqing Wang, W.-C. Liu: AC-1: a clock-powered microprocessor. ISLPED 1997: 328-333
	1996
10	EE	William C. Athas, W.-C. Liu, Lars J. Svensson: Energy-recovery CMOS for highly pipelined DSP designs. ISLPED 1996: 101-104
9	EE	Nestoras Tzartzanis, William C. Athas: Energy recovery for the design of high-speed, low-power static RAMs. ISLPED 1996: 55-60
	1995
8	EE	William C. Athas, Nestoras Tzartzanis: Energy recovery for low-power CMOS. ARVLSI 1995: 415-429
7	EE	Nestoras Tzartzanis, William C. Athas: Design and analysis of a low-power energy-recovery adder. Great Lakes Symposium on VLSI 1995: 66-69
6	EE	John Bunda, Donald S. Fussell, William C. Athas: Energy-efficient instruction set architecture for CMOS microprocessors. HICSS (1) 1995: 298-305
	1994
5	EE	William C. Athas, Lars J. Svensson, J. G. Koller, Nestoras Tzartzanis, E. Ying-Chin Chou: Low-power digital systems based on adiabatic-switching principles. IEEE Trans. VLSI Syst. 2(4): 398-407 (1994)
	1993
4		John Bunda, Donald S. Fussell, Roy M. Jenevein, William C. Athas: 16-Bit vs. 32-Bit Instructions for Pipelined Microprocessors. ISCA 1993: 237-246
	1991
3	EE	Jeffrey T. Draper, Joydeep Ghosh, William C. Athas: The M-cache: a message-retrieving mechanism for multicomputer systems. SPDP 1991: 258-265
	1989
2	EE	William C. Athas, Nanette J. Boden: Cantor: an actor programming system for scientific computing. SIGPLAN Notices 24(4): 66-68 (1989)
	1988
1		William C. Athas, Charles L. Seitz: Multicomputers: Message-Passing Concurrent Computers. IEEE Computer 21(8): 9-24 (1988)

Coauthor Index

1	Peter A. Beerel	[15] [17]
2	Nanette J. Boden	[2]
3	John Bunda	[4] [6]
4	E. Ying-Chin Chou	[5]
5	Jeffrey T. Draper (Jeff Draper)	[3] [17]
6	Donald S. Fussell	[4] [6]
7	Joydeep Ghosh	[3]
8	Roy M. Jenevein	[4]
9	Xing Yu Jiang	[11]
10	J. G. Koller	[5]
11	Huimin Li	[11]
12	W.-C. Liu	[10] [11]
13	Joong-Seok Moon	[15] [17]
14	Lena Peterson	[11]
15	Andrew Reinhart	[16]
16	Charles L. Seitz	[1]
17	Sigfrid D. Soli	[17]
18	Lars J. Svensson	[5] [10] [11]
19	Nestoras Tzartzanis	[5] [7] [8] [9] [11] [12] [13]
20	Peiqing Wang	[11]
21	Lynn Youngs	[16]

Colors in the list of coauthors