Venkatesh Arunachalam
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2008
1
EE
Venkatesh Arunachalam,
Wayne Burleson
: Low-power clock distribution in a multilayer core 3d microprocessor.
ACM Great Lakes Symposium on VLSI 2008
: 429-434
Coauthor Index
1
Wayne P. Burleson
(Wayne Burleson)
[
1
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Copyright ©
Tue Nov 3 08:52:44 2009 by
Michael Ley
(
ley@uni-trier.de
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