| 2007 |
| 20 | EE | Prateek Pujara,
Aneesh Aggarwal:
Increasing cache capacity through word filtering.
ICS 2007: 222-231 |
| 19 | EE | Rajdeep Bhowmik,
Chaitali Gupta,
Madhusudhan Govindaraju,
Aneesh Aggarwal:
Efficient XML-Based Grid Middleware Design for Multi-Core Processors.
ICWS 2007: 1197-1198 |
| 2006 |
| 18 | EE | Joseph J. Sharkey,
Nayef Abu-Ghazeleh,
Dmitry V. Ponomarev,
Kanad Ghose,
Aneesh Aggarwal:
Trade-Offs in Transient Fault Recovery Schemes for Redundant Multithreaded Processors.
HiPC 2006: 135-147 |
| 17 | EE | Deniz Balkan,
Joseph J. Sharkey,
Dmitry Ponomarev,
Aneesh Aggarwal:
Address-Value Decoupling for Early Register Deallocation.
ICPP 2006: 337-346 |
| 16 | EE | Sumeet Kumar,
Aneesh Aggarwal:
Self-checking instructions: reducing instruction redundancy for concurrent error detection.
PACT 2006: 64-73 |
| 2005 |
| 15 | EE | Prateek Pujara,
Aneesh Aggarwal:
Restrictive Compression Techniques to Increase Level 1 Cache Capacity.
ICCD 2005: 327-333 |
| 14 | EE | Aneesh Aggarwal:
Reducing latencies of pipelined cache accesses through set prediction.
ICS 2005: 2-11 |
| 13 | EE | Aneesh Aggarwal,
Manoj Franklin:
Instruction Replication for Reducing Delays Due to Inter-PE Communication Latency.
IEEE Trans. Computers 54(12): 1496-1507 (2005) |
| 12 | EE | Aneesh Aggarwal,
Manoj Franklin:
Scalability Aspects of Instruction Distribution Algorithms for Clustered Processors.
IEEE Trans. Parallel Distrib. Syst. 16(10): 944-955 (2005) |
| 2004 |
| 11 | EE | Aneesh Aggarwal:
Single FU Bypass Networks for High Clock Rate Superscalar Processors.
HiPC 2004: 319-332 |
| 10 | EE | Aneesh Aggarwal,
Manoj Franklin,
Oguz Ergin:
Defining Wakeup Width for Efficient Dynamic Scheduling.
ICCD 2004: 36-41 |
| 9 | EE | Sumeet Kumar,
Prateek Pujara,
Aneesh Aggarwal:
Bit-Sliced Datapath for Energy-Efficient High Performance Microprocessors.
PACS 2004: 30-45 |
| 8 | EE | Abdel-Hameed A. Badawy,
Aneesh Aggarwal,
Donald Yeung,
Chau-Wen Tseng:
The Efficacy of Software Prefetching and Locality Optimizations on Future Memory Systems.
J. Instruction-Level Parallelism 6: (2004) |
| 2003 |
| 7 | EE | Aneesh Aggarwal,
Manoj Franklin:
Energy Efficient Asymmetrically Ported Register Files.
ICCD 2003: 2-7 |
| 6 | EE | Aneesh Aggarwal,
Manoj Franklin:
Instruction Replication: Reducing Delays Due to Inter-PE Communication Latency.
IEEE PACT 2003: 46-55 |
| 2002 |
| 5 | EE | Aneesh Aggarwal,
Manoj Franklin:
Hierarchical Interconnects for On-Chip Clustering.
IPDPS 2002 |
| 4 | EE | Aneesh Aggarwal:
Software caching vs. prefetching.
MSP/ISMM 2002: 263-268 |
| 2001 |
| 3 | EE | Aneesh Aggarwal,
Manoj Franklin:
Putting Data Value Predictors to Work in Fine-Grain Parallel Processors.
HiPC 2001: 204-213 |
| 2 | EE | Abdel-Hameed A. Badawy,
Aneesh Aggarwal,
Donald Yeung,
Chau-Wen Tseng:
Evaluating the impact of memory system performance on software prefetching and locality optimizations.
ICS 2001: 486-500 |
| 1 | | Aneesh Aggarwal,
Keith H. Randall:
Related Field Analysis.
PLDI 2001: 214-220 |