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Miron Abramovici

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2007
61EEJohn M. Emmert, Charles E. Stroud, Miron Abramovici: Online Fault Tolerance for FPGA Logic Blocks. IEEE Trans. VLSI Syst. 15(2): 216-226 (2007)
2006
60EEMiron Abramovici, Paul Bradley, Kumar N. Dwarakanath, Peter Levin, Gérard Memmi, Dave Miller: A reconfigurable design-for-debug infrastructure for SoCs. DAC 2006: 7-12
2005
59EEXiaoming Yu, Miron Abramovici: Sequential circuit ATPG using combinational algorithms. IEEE Trans. on CAD of Integrated Circuits and Systems 24(8): 1294-1310 (2005)
2004
58EEMiron Abramovici, Charles E. Stroud, John M. Emmert: Online BIST and BIST-based diagnosis of FPGA logic blocks. IEEE Trans. VLSI Syst. 12(12): 1284-1294 (2004)
2002
57EEMiron Abramovici, Xiaoming Yu, Elizabeth M. Rudnick: Low-cost sequential ATPG with clock-control DFT. DAC 2002: 243-248
56EEMiron Abramovici, Charles E. Stroud, Marty Emmert: Using embedded FPGAs for SoC yield improvement. DAC 2002: 713-724
55EEMiron Abramovici, Charles E. Stroud: BIST-Based Delay-Fault Testing in FPGAs. IOLTW 2002: 131-134
54EECharles E. Stroud, Jeremy Nall, Matthew Lashinsky, Miron Abramovici: BIST-Based Diagnosis of FPGA Interconnect. ITC 2002: 618-627
2001
53EEJohn M. Emmert, Stanley Baumgart, Pankaj Kataria, Andrew M. Taylor, Charles E. Stroud, Miron Abramovici: On-Line Fault Tolerance for FPGA Interconnect with Roving STARs. DFT 2001: 445-454
52EEMiron Abramovici, John M. Emmert, Charles E. Stroud: Roving Stars: An Integrated Approach To On-Line Testing, Diagnosis, And Fault Tolerance For Fpgas In Adaptive Computing Systems. Evolvable Hardware 2001: 73-92
51EEMiron Abramovici, Charles E. Stroud, Matthew Lashinsky, Jeremy Nall, John M. Emmert: On-Line BIST and Diagnosis of FPGA Interconnect Using Roving STARs. IOLTW 2001: 27-33
50 Jongshin Shin, Xiaoming Yu, Elizabeth M. Rudnick, Miron Abramovici: At-speed logic BIST using a frozen clock testing strategy. ITC 2001: 64-71
49EEMiron Abramovici, Charles E. Stroud: BIST-based test and diagnosis of FPGA logic blocks. IEEE Trans. VLSI Syst. 9(1): 159-172 (2001)
2000
48EEJohn M. Emmert, Charles E. Stroud, Brandon Skaggs, Miron Abramovici: Dynamic Fault Tolerance in FPGAs via Partial Reconfiguration. FCCM 2000: 165-174
47EEJohn M. Emmert, Charles E. Stroud, Jason A. Cheatham, Andrew M. Taylor, Pankaj Kataria, Miron Abramovici: Performance Penalty for Fault Tolerance in Roving STARs. FPL 2000: 545-554
46EEMiron Abramovici, Charles E. Stroud, Brandon Skaggs, John M. Emmert: Improving On-Line BIST-Based Diagnosis for Roving STARs. IOLTW 2000: 31-39
45 Miron Abramovici, Charles E. Stroud: DIST-based detection and diagnosis of multiple faults in FPGAs. ITC 2000: 785-794
44 Qiang Peng, Miron Abramovici, Jacob Savir: MUST: multiple-stem analysis for identifying sequentially untestable faults. ITC 2000: 839-846
43EEDavid E. Long, Mahesh A. Iyer, Miron Abramovici: FILL and FUNI: algorithms to identify illegal states and sequentially untestable faults. ACM Trans. Design Autom. Electr. Syst. 5(3): 631-657 (2000)
42 Miron Abramovici, José T. de Sousa: A SAT Solver Using Reconfigurable Hardware and Virtual Logic. J. Autom. Reasoning 24(1/2): 5-36 (2000)
41EEElizabeth M. Rudnick, Miron Abramovici: Compact Test Generation Using a Frozen Clock Testing Strategy. J. Inf. Sci. Eng. 16(5): 703-717 (2000)
1999
40EEMiron Abramovici, José T. de Sousa, Daniel G. Saab: A Massively-Parallel Easily-Scalable Satisfiability Solver Using Reconfigurable Hardware. DAC 1999: 684-690
39EEYanti Santoso, Matthew C. Merten, Elizabeth M. Rudnick, Miron Abramovici: FreezeFrame: Compact Test Generation Using a Frozen Clock Strategy. DATE 1999: 747-
38EEMiron Abramovici, José T. de Sousa: A Virtual Logic Algorithm for Solving Satisfiability Problems Using Reconfigurable Hardware. FCCM 1999: 306-307
37 Miron Abramovici, Charles E. Stroud, Carter Hamilton, Sajitha Wijesuriya, Vinay Verma: Using roving STARs for on-line testing and diagnosis of FPGAs in fault-tolerant applications. ITC 1999: 973-982
1998
36EECharles E. Stroud, Sajitha Wijesuriya, Carter Hamilton, Miron Abramovici: Built-in self-test of FPGA interconnect. ITC 1998: 404-411
1997
35EEMiron Abramovici, Premachandran R. Menon: Fault simulation on reconfigurable hardware. FCCM 1997: 182-191
34 Miron Abramovici, Daniel G. Saab: Satisfiability on reconfigurable hardware. FPL 1997: 448-456
33 Charles E. Stroud, Eric Lee, Miron Abramovici: BIST-Based Diagnostics of FPGA Logic Blocks. ITC 1997: 539-547
1996
32EEMahesh A. Iyer, David E. Long, Miron Abramovici: Identifying Sequential Redundancies Without Search. DAC 1996: 457-462
31EECharles E. Stroud, Ping Chen, Srinivasa Konala, Miron Abramovici: Evaluation of FPGA Resources for Built-In Self-Test of Programmable Logic Blocks. FPGA 1996: 107-113
30 Charles E. Stroud, Eric Lee, Srinivasa Konala, Miron Abramovici: Using ILA Testing for BIST in FPGAs. ITC 1996: 68-75
29EEKrishna B. Rajan, David E. Long, Miron Abramovici: Increasing testability by clock transformation (getting rid of those darn states). VTS 1996: 224-230
28EECharles E. Stroud, Srinivasa Konala, Ping Chen, Miron Abramovici: Built-in self-test of logic blocks in FPGAs (Finally, a free lunch: BIST without overhead!). VTS 1996: 387-392
27EEMahesh A. Iyer, Miron Abramovici: FIRE: a fault-independent combinational redundancy identification algorithm. IEEE Trans. VLSI Syst. 4(2): 295-301 (1996)
1995
26 Prashant S. Parikh, Miron Abramovici: On Combining Design for Testability Techniques. ITC 1995: 423-429
25EEDavid E. Long, Mahesh A. Iyer, Miron Abramovici: Identifying sequentially untestable faults using illegal states. VTS 1995: 4-11
1994
24 Mahesh A. Iyer, Miron Abramovici: Sequentially Untestable Faults Identified Without Search ("Simple Implications Beat Exhaustive Search!"). ITC 1994: 259-266
23 Mahesh A. Iyer, Miron Abramovici: Low-Cost Redundancy Identification for Combinatorial Circuits. VLSI Design 1994: 315-318
1993
22EEPrashant S. Parikh, Miron Abramovici: A Cost-Based Approach to Partial Scan. DAC 1993: 255-259
21 Miron Abramovici, Prashant S. Parikh, Ben Mathew, Daniel G. Saab: On Selecting Flip-Flops for Partial Reset. ITC 1993: 1008-1012
20 Miron Abramovici: DOs and DON'Ts in Computing Fault Coverage. ITC 1993: 594
1992
19EEMiron Abramovici, Krishna B. Rajan, David T. Miller: Freeze!: A New Approach for Testing Sequential Circuits. DAC 1992: 22-25
18 Miron Abramovici, Prashant S. Parikh: Warning: 100% Fault Coverage May Be Misleading!! ITC 1992: 662-668
17 Miron Abramovici, Mahesh A. Iyer: One-Pass Redundancy Identification and Removal. ITC 1992: 807-815
16EEMiron Abramovici, David T. Miller, Rabindra K. Roy: Dynamic redundancy identification in automatic test generation. IEEE Trans. on CAD of Integrated Circuits and Systems 11(3): 404-407 (1992)
1991
15 Miron Abramovici, James J. Kulikowski, Rabindra K. Roy: The Best Flip-Flops to Scan. ITC 1991: 166-173
14EEPremachandran R. Menon, Ytzhak H. Levendel, Miron Abramovici: SCRIPT: a critical path tracing algorithm for synchronous sequential circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 10(6): 738-747 (1991)
1988
13 Miron Abramovici, B. Krishnamurthy, A. Mathews, B. Rogers, M. Schulz, S. Seth, John A. Waicukauski: What is the Path to Fast Fault Simulation? ITC 1988: 183-192
1986
12 Miron Abramovici, Premachandran R. Menon, David T. Miller: Checkpoint Faults are not Sufficient Target Faults for Test Generation. IEEE Trans. Computers 35(8): 769-771 (1986)
1985
11 Miron Abramovici, James J. Kulikowski, Premachandran R. Menon, David T. Miller: Test Generation In Lamp2: System Overview. ITC 1985: 45-48
10 Miron Abramovici, James J. Kulikowski, Premachandran R. Menon, David T. Miller: Test Generation In Lamp2: Concepts and Algorithms. ITC 1985: 49-56
9 Miron Abramovici: Low-Cost Fault Simulation: Why, When and How. ITC 1985: 795
8 Miron Abramovici, Premachandran R. Menon: A Practical Approach to Fault Simulation and Test Generation for Bridging Faults. IEEE Trans. Computers 34(7): 658-663 (1985)
1983
7 Miron Abramovici, Premachandran R. Menon: A Practical Approach to Fault Simulation and Test Generation for Bridging Faults. ITC 1983: 138-142
6EEMiron Abramovici, Ytzhak H. Levendel, Premachandran R. Menon: A Logic Simulation Machine. IEEE Trans. on CAD of Integrated Circuits and Systems 2(2): 82-94 (1983)
1982
5EEMiron Abramovici, Ytzhak H. Levendel, Premachandran R. Menon: A logic simulation machine. ISCA 1982: 148-157
4 Miron Abramovici, Melvin A. Breuer: Fault Diagnosis in Synchronous Sequential Circuits Based on an Effect-Cause Analysis. IEEE Trans. Computers 31(12): 1165-1172 (1982)
3 Miron Abramovici: A Hierarchical, Path-Oriented Approach to Fault Diagnosis in Modular Combinational Circuits. IEEE Trans. Computers 31(7): 672-677 (1982)
1980
2 Miron Abramovici, Melvin A. Breuer: Multiple Fault Diagnosis in Combinational Circuits Based on an Effect-Cause Analysis. IEEE Trans. Computers 29(6): 451-460 (1980)
1979
1 Miron Abramovici, Melvin A. Breuer: On Redundancy and Fault Detection in Sequential Circuits. IEEE Trans. Computers 28(11): 864-865 (1979)

Coauthor Index

1Stanley Baumgart [53]
2Paul Bradley [60]
3Melvin A. Breuer [1] [2] [4]
4Jason A. Cheatham [47]
5Ping Chen [28] [31]
6Kumar N. Dwarakanath [60]
7John M. Emmert [46] [47] [48] [51] [52] [53] [58] [61]
8Marty Emmert [56]
9Carter Hamilton [36] [37]
10Mahesh A. Iyer [17] [23] [24] [25] [27] [32] [43]
11Pankaj Kataria [47] [53]
12Srinivasa Konala [28] [30] [31]
13B. Krishnamurthy [13]
14James J. Kulikowski [10] [11] [15]
15Matthew Lashinsky [51] [54]
16Eric Lee [30] [33]
17Ytzhak H. Levendel [5] [6] [14]
18Peter Levin [60]
19David E. Long [25] [29] [32] [43]
20Ben Mathew [21]
21A. Mathews [13]
22Gérard Memmi [60]
23Premachandran R. Menon [5] [6] [7] [8] [10] [11] [12] [14] [35]
24Matthew C. Merten [39]
25Dave Miller [60]
26David T. Miller [10] [11] [12] [16] [19]
27Jeremy Nall [51] [54]
28Prashant S. Parikh [18] [21] [22] [26]
29Qiang Peng [44]
30Krishna B. Rajan [19] [29]
31B. Rogers [13]
32Rabindra K. Roy [15] [16]
33Elizabeth M. Rudnick [39] [41] [50] [57]
34Daniel G. Saab [21] [34] [40]
35Yanti Santoso [39]
36Jacob Savir [44]
37M. Schulz [13]
38S. Seth [13]
39Jongshin Shin [50]
40Brandon Skaggs [46] [48]
41José T. de Sousa [38] [40] [42]
42Charles E. Stroud [28] [30] [31] [33] [36] [37] [45] [46] [47] [48] [49] [51] [52] [53] [54] [55] [56] [58] [61]
43Andrew M. Taylor [47] [53]
44Vinay Verma [37]
45John A. Waicukauski [13]
46Sajitha Wijesuriya [36] [37]
47Xiaoming Yu [50] [57] [59]

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Copyright © Thu Jun 5 07:42:39 2008 by Michael Ley (ley@uni-trier.de)