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Samar Abdi

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2007
13EEHansu Cho, Samar Abdi, Daniel Gajski: Interface synthesis for heterogeneous multi-core systems from transaction level models. LCTES 2007: 140-142
12EEInes Viskic, Samar Abdi, Daniel D. Gajski: Automatic generation of embedded communication SW for heterogeneous MPSoC platforms. LCTES 2007: 143-145
2006
11EEHansu Cho, Samar Abdi, Daniel Gajski: Design and implementation of transducer for ARM-TMS communication. ASP-DAC 2006: 126-127
10EESamar Abdi, Daniel Gajski: Verification of System Level Model Transformations. International Journal of Parallel Programming 34(1): 29-59 (2006)
2005
9EESamar Abdi, Daniel Gajski: A formalism for functionality preserving system level transformations. ASP-DAC 2005: 139-144
8EEJunyu Peng, Samar Abdi, Daniel Gajski: A clustering technique to optimize hardware/software synchronization. ASP-DAC 2005: 965-968
7EESamar Abdi, Daniel D. Gajski: Functional Validation of System Level Static Scheduling. DATE 2005: 542-547
2004
6EESamar Abdi, Daniel Gajski: On deriving equivalent architecture model from system specification. ASP-DAC 2004: 322-327
5EEDongwan Shin, Samar Abdi, Daniel Gajski: Automatic generation of bus functional models from transaction level models. ASP-DAC 2004: 756-758
4EESamar Abdi, Daniel Gajski: Automatic generation of equivalent architecture model from functional specification. DAC 2004: 608-613
2003
3EESamar Abdi, Dongwan Shin, Daniel Gajski: Automatic communication refinement for system level design. DAC 2003: 300-305
2002
2EEJunyu Peng, Samar Abdi, Daniel Gajski: Automatic Model Refinement for Fast Architecture Exploration. ASP-DAC 2002: 332-337
1EEJunyu Peng, Samar Abdi, Daniel Gajski: Automatic Model Refinement for Fast Architecture Exploration. VLSI Design 2002: 332-337

Coauthor Index

1Hansu Cho [11] [13]
2Daniel Gajski (Daniel D. Gajski) [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13]
3Junyu Peng [1] [2] [8]
4Dongwan Shin [3] [5]
5Ines Viskic [12]

Copyright © Thu Jun 5 07:42:39 2008 by Michael Ley (ley@uni-trier.de)