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10. PATMOS 2000: Göttingen, Germany

Dimitrios Soudris, Peter Pirsch, Erich Barke (Eds.): Integrated Circuit Design, Power and Timing Modeling, Optimization and Simulation, 10th International Workshop, PATMOS 2000, Göttingen, Germany, September 13-15, 2000, Proceedings. Lecture Notes in Computer Science 1918 Springer 2000, ISBN 3-540-41068-6 CiteSeerX Google scholar pubzone.org BibTeX bibliographical record in XML
@proceedings{DBLP:conf/patmos/2000,
  editor    = {Dimitrios Soudris and
               Peter Pirsch and
               Erich Barke},
  title     = {Integrated Circuit Design, Power and Timing Modeling, Optimization
               and Simulation, 10th International Workshop, PATMOS 2000, G{\"o}ttingen,
               Germany, September 13-15, 2000, Proceedings},
  booktitle = {PATMOS},
  publisher = {Springer},
  series    = {Lecture Notes in Computer Science},
  volume    = {1918},
  year      = {2000},
  isbn      = {3-540-41068-6},
  bibsource = {DBLP, http://dblp.uni-trier.de}
}

Opening

RTL Power Modeling

Power Estimation and Optimization

System-Level Design

Transistor-Level Modeling

Asynchronous Circuit Design

Power Efficient Technologies

Design of Multimedia Processing Applications

Adiabatic Design and Arithmetic Modules

Analog-Digital Circuits Modeling

Copyright © Mon Nov 2 21:02:15 2009 by Michael Ley (ley@uni-trier.de)