ISCAS 2008:
Seattle,
Washington,
USA
International Symposium on Circuits and Systems (ISCAS 2008), 18-21 May 2008, Sheraton Seattle Hotel, Seattle, Washington, USA.
IEEE 2008
- Mani Soma:
Enhancing industry participation in ISCAS and Circuits and Systems Society.
Data Converters I
- Andrea Agnes, Edoardo Bonizzoni, Franco Maloberti:
Design of an ultra-low power SA-ADC with medium/high resolution and speed.
1-4
- He Gong Wei, U. Fat Chio, Sai-Weng Sin, Seng-Pan U., Rui Paulo Martins:
A power scalable 6-bit 1.2GS/s flash ADC with power on/off Track-and-Hold and preamplifier.
5-8
- Hee-Cheol Choi, Young-Ju Kim, Se-Won Lee, Jae-Yeol Han, Oh-Bong Kwon, Younglok Kim, Seung-Hoon Lee:
A 52mW 0.56mm2 1.2V 12b 120MS/s SHA-Free dual-channel Nyquist ADC based on mid-code calibration.
9-12
- Sedigheh Hashemi, Omid Shoaei:
A 0.9V 10-bit 100 MS/s switched-RC pipelined ADC without using a front-end S/H in 90nm CMOS.
13-16
- Manar El-Chammas, Boris Murmann:
General analysis on the impact of phase-skew in time-interleaved ADCs.
17-20
Video Processing Circuits
- Chong-Yu Huang, Lien-Fei Chen, Yeong-Kang Lai:
A high-speed 2-D transform architecture with unique kernel for multi-standard video applications.
21-24
- Bruno Zatt, Altamiro Amadeu Susin, Sergio Bampi, Luciano Volcan Agostini:
HP422-MoCHA: A H.264/AVC High Profile motion compensation architecture for HDTV.
25-28
- Yi-Hau Chen, Tzu-Der Chuang, Yu-Han Chen, Chen-Han Tsai, Liang-Gee Chen:
Frame-parallel design strategy for high definition B-frame H.264/AVC encoder.
29-32
- WonHee Son, In-Cheol Park:
Prediction-based real-time CABAC decoder for high definition H.264/AVC.
33-36
- X. H. Tian, Thinh M. Le, X. Jiang, Yong Lian:
A HW CABAC encoder with efficient context access scheme for H.264/AVC.
37-40
Adaptive Algorithms & Systems
Amplifiers I
- Sushmit Goswami, Tino Copani, Bert Vermeire, Hugh Bamaby:
BW extension in shunt feedback transimpedance amplifiers using negative miller capacitance.
61-64
- Maria Teresa Sanz, Jose Maria Garcia del Pozo, Santiago Celma, Juan Pablo Alegre, Arturo Sarmiento:
Tunable transimpedance amplifiers with constant bandwidth for optical communications.
65-68
- Bradley A. Minch:
A simple class-AB transconductor in CMOS.
69-72
- Clara Isabel Lujan-Martinez, Antonio B. Torralba, Ramón González Carvajal, Jaime Ramírez-Angulo, Antonio J. López-Martín:
A -72 dB @ 2 MHz IM3 CMOS tunable pseudo-differential transconductor.
73-76
- Kent D. Layton, Donald T. Corner, David J. Corner:
Bulk-driven gain-enhanced fully-differential amplifier for VT + 2Vdsat operation.
77-80
Configurable Radio Systems
Complex Networks Analysis & Applications
Blind Signal Processing for MIMO Systems
- Mitsuru Kawamoto, Yujiro Inouye, Kiyotaka Kohno:
Recently developed approaches for solving blind deconvolution of MIMO-IIR Systems: Super-exponential and eigenvector methods.
121-124
- Feng Wan, Wei-Ping Zhu, M. N. S. Swamy:
Semi-blind channel estimation of MIMO-OFDM systems with pulse shaping.
125-128
- Feng Wan, Wei-Ping Zhu, M. N. S. Swamy:
Perturbation analysis of subspace-based semi-blind MIMO channel estimation approaches.
129-132
- Weizhou Su, Qingqi Bi, Wei Xing Zheng, Shengli Xie:
Blind identification of MIMO channels with periodic precoders.
133-136
- Borching Su, Palghat P. Vaidyanathan:
Blind block synchronization algorithms in cyclic prefix systems.
137-140
Current-mode,
Analog & Mixed-Signal Circuits
- Massimo Alioto, Gaetano Palumbo:
Power-delay optimization in MCML tapered buffers.
141-144
- Armin Tajalli, Frank K. Gürkaynak, Yusuf Leblebici, Massimo Alioto, Elizabeth J. Brauer:
Improving the power-delay product in SCL circuits using source follower output stage.
145-148
- Santanu Sarkar, Ravi Sankar Prasad, Sanjoy Kumar Dey, Vinay Belde, Swapna Banerjee:
An 8-bit 1.8 V 500 MS/s CMOS DAC with a novel four-stage current steering architecture.
149-152
- Toru Fujimura, Shigetoshi Nakatake:
Transistor-level programmable MOS analog IC with body biasing.
153-156
- Hyun-Kyu Jeon, Hye-Ran Kim, Jung-Min Choi, Ju-Pyo Hong, Yong-Suk Kim, Hyung-Seog Oh, Dae-Keun Han, Lee-Sup Kim:
High speed serial interface for mobile LCD driver IC.
157-160
Nano-Sensors & Nano-technologies for Bio-medical Applications
- Jose Martinez-Quijada, Sazzadur Chowdhury:
A two-stator MEMS power generator for cardiac pacemakers.
161-164
- Somashekar Bangalore Prakash, Pamela Abshire:
A fully differential CMOS capacitance sensor design, testing and array architecture.
165-168
- Stephen Thornhill, Nathanael Wu, Zhengfei Wang, Qinwei Shi, Jie Chen:
Graphene nanoribbon field-effect transistors.
169-172
- Liwei Shang, Ming Liu, Sansiri Tanachutiwat, Wei Wang:
Analyzing mixed carbon nanotube bundles: A current density study.
173-176
- Rehman Ashraf, Malgorzata Chrzanowska-Jeske, Siva G. Narendra:
Carbon nanotube circuit design choices in the presence of metallic tubes.
177-180
Millimeter-wave & Optical Communications
- KaChun Kwok:
Bilateral design of mm-wave LNA and receiver front-end in 90nm CMOS.
181-184
- Yiling Zhang, Valencia Joyner, Ruida Yun, Sameer R. Sonkusale:
A 700Mbit/s CMOS capacitive feedback front-end amplifier with automatic gain control for broadband optical wireless links.
185-188
- Anthony Kopa, Alyssa B. Apsel:
124dB.Hz2/3 Dynamic range transimpedance amplifier for electronic-photonic channelizer.
189-192
- Paul C. P. Chen, Anand Pappu, Zhongtao Fu, Woradorn Wattanapanitch, Alyssa B. Apsel:
A 10 Gb/s optical receiver in 0.25 µm silicon-on-sapphire CMOS.
193-196
- Jingjing Liu, Grahame E. Faulkner, Steve Collins, Dominic C. O'Brien, S. J. Elston:
An optically powered, free space optical communications receiver.
197-200
Graph Theory & Computing
Data Converters II
- Bruno Esperanca, João Goes, Rui Tavares, Acacio Galhardo, Nuno F. Paulino, M. M. Silva:
Power-and-area efficient 14-bit 1.5 MSample/s two-stage algorithmic ADC based on a mismatch-insensitive MDAC.
220-223
- Zheng Yang, Jan Van der Spiegel:
A 10-bit 8.3MS/s switched-current successive approximation ADC for column-parallel imagers.
224-227
- Yongjian Tang, Hans Hegt, Arthur H. M. van Roermund:
Predictive timing error calibration technique for RF current-steering DACs.
228-231
- Michael Figueiredo, Nuno F. Paulino, Guiomar Evans, João Goes:
New simple digital self-calibration technique for pipeline ADCs using the internal thermal noise.
232-235
- Jeong-Sup Lee, In-Cheol Park:
Capacitor array structure and switch control for energy-efficient SAR analog-to-digital converters.
236-239
Coding,
Crypto & Imaging Circuits
Image & Video Processing I
Amplifiers II
- Chung-Wei Lin, Yung-Ping Lee, Wen-Tsao Chen:
A 1.5 bit 5th order CT/DT delta sigma class D amplifier with power efficiency improvement.
280-283
- Tong Ge, Joseph Sylvester Chang, Wei Shu:
PSRR of bridge-tied load PWM Class D Amps.
284-287
- Jaime Ramírez-Angulo, Ramón González Carvajal, Antonio J. López-Martín:
High slew rate two stage A/AB and AB/AB op-amps with phase lead compensation at output node and local common mode feedback.
288-291
- Lucía Acosta-Cabanillas, Ramón González Carvajal, Jaime Ramírez-Angulo, Antonio J. López-Martín:
A simple approach for the implementation of CMOS amplifiers with constant bandwidth independent of gain.
292-295
- Majid Jalalifar, Mohammad Yavari, Farshid Raissi:
A novel topology in RNMC amplifiers with single miller compensation capacitor.
296-299
MIMO Communications Systems
- Christoph Studer, Peter Luethi, Wolfgang Fichtner:
VLSI architecture for data-reduced steering matrix feedback in MIMO systems.
300-303
- Christian Senning, Christoph Studer, Peter Luethi, Wolfgang Fichtner:
Hardware-efficient steering matrix computation architecture for MIMO communication systems.
304-307
- Amirhossein Alimohammad, Saeed Fouladi Fard, Bruce F. Cockburn, Christian Schlegel:
A single-FPGA multipath MIMO fading channel simulator.
308-311
- Yongmei Dai, Zhiyuan Yan:
A modified MMSE-SD soft detector for coded MIMO-OFDM systems.
312-315
- Mahdi Shabany, P. Glenn Gulak:
The application of lattice-reduction to the K-Best algorithm for near-optimal MIMO detection.
316-319
Applications of Nonlinear Dynamics
Advanced Neural Microsystems
- Gerald E. Loeb, Jack Wills:
General-pupose technology for a general-purpose nervous system.
340-343
- John G. Harris, Jose C. Principe, Justin C. Sanchez, Du Chen, Christy She:
Pulse-based signal compression for implanted neural recording systems.
344-347
- Wesley Santa, Randy Jensen, Keith Miesel, Dave Carlson, Al Avestruz, G. Molnar, T. Denison:
Radios for the brain? a practical micropower sensing and algorithm architecture for neurostimulators.
348-351
- Torsten Lehmann, Nigel H. Lovell, Gregg J. Suaning, Philip Preston, Yan T. Wong, Norbert Dommel, Louis H. Jung, Yashodhan Moghe, Kushal Das:
Implant electronics for intraocular epiretinal neuro-stimulators.
352-355
- Edgar A. Brown, James D. Ross, Richard A. Blum, Stephen P. DeWeerth:
Stimulation and recording of neural tissue, closing the loop on the artifact.
356-359
System on Chip
- Haytham Elmiligi, Ahmed A. Morgan, M. Watheq El-Kharashi, Fayez Gebali:
Power-aware topology optimization for networks-on-chips.
360-363
- Charles Thangaraj, Tom Chen:
Design target exploration for meeting time-to-market using pareto analysis.
364-367
- Omar Hammami, Zoukun Wang, Virginie Fresse, Dominique Houzet:
A quantitative evaluation of C-based synthesis on heterogeneous embedded systems design.
368-371
- Himanshu Kaul, Jae-sun Seo, Mark Anders, Dennis Sylvester, Ram Krishnamurthy:
A robust alternate repeater technique for high performance busses in the multi-core era.
372-375
- Emre Salman, Renatas Jakushokas, Eby G. Friedman, Radu M. Secareanu, Olin L. Hartin:
Input port reduction for efficient substrate extraction in large scale IC's.
376-379
Design for Variability in Nano-technologies & Giga-scale Systems
- Girish Varatkar, Sriram Narayanan, Naresh R. Shanbhag, Douglas L. Jones:
Variation-tolerant, low-power PN-code acquisition using stochastic sensor NOC.
380-383
- Saibal Mukhopadhyay, Rahul M. Rao, Jae-Joon Kim, Ching-Te Chuang:
Capacitive coupling based transient negative bit-line voltage (Tran-NBL) scheme for improving write-ability of SRAM design in nanometer technologies.
384-387
- Xuan Zhang, Anand Pappu, Alyssa B. Apsel:
Low variation current source for 90nm CMOS.
388-391
- Shreyas Sen, Abhijit Chatterjee:
Design of process variation tolerant radio frequency low noise amplifier.
392-395
- Eduardo Luis Rhod, Mateus B. Rutzig, Luigi Carro:
Binary translation process to optimize nanowire arrays usage.
396-399
Multimedia Analysis & Quality Assessment
- Guangtao Zhai, Weisi Lin, Jianfei Cai, Xiaokang Yang, Wenjun Zhang, Minoru Etoh:
Cross-dimensional quality assessment for low bitrate video.
400-403
- Huijuan Yang, Alex C. Kot:
Backward-forward distortion minimization for binary images data hiding.
404-407
- Susu Yao, Ee Ping Ong, Mei Hwan Loke:
Peceptual distortion metric based on wavelet frequency sensitivity and multiple visual fixations.
408-411
- Min-Jen Tsai, Chen-Sheng Wang:
Adaptive feature selection for digital camera source identification.
412-415
- Amaro A. de Lima, Fabio P. Freeland, Rafael A. de Jesus, Bruno C. Bispo, Luiz W. P. Biscainho, Sergio L. Netto, Amir Said, Antonius A. C. M. Kalker, Ronald Schafer, Bowon Lee, Mehrban Jam:
On the quality assessment of sound signals.
416-419
Spiking Neural Networks
- Jonathan Tapson, Mark P. Vismer, Craig T. Jin, André van Schaik, Fopefolu O. Folowosele, Ralph Etienne-Cummings:
A two-neuron cross-correlation circuit with a wide and continuous range of time delay.
420-423
- Zhengming Fu, Eugenio Culurciello, Patrick Lichtsteiner, Tovi Delbruck:
Fall detection using an address-event temporal contrast vision sensor.
424-427
- Arindam Basu, Csaba Petre, Paul E. Hasler:
Bifurcations in a silicon neuron.
428-431
- Stephen Brink, Scott Koziol, Shubha Ramakrishnan, Paul E. Hasler:
A biophysically based dendrite model using programmable floating-gate devices.
432-435
- Jie Xu, John G. Harris:
The time derivative neuron.
436-439
Wireless Circuits and Systems I
- Jagdish Nayayan Pandey, Bharadwaj Amrutur, Sudhir S. Kudva:
Quadrature generation techniques for frequency multiplication based oscillators.
440-443
- Li Ke, Reuben Wilcock, Peter R. Wilson:
Improved 6.7GHz CMOS VCO delay cell with up to seven octave tuning range.
444-447
- Zhenyu Yang, Zhangwen Tang, Hao Min:
A fully differential charge pump with accurate current matching and rail-to-rail common-mode feedback circuit.
448-451
- Jeongwon Cha, Minsik Ahn, Changhyuk Cho, Chang-Ho Lee, Joy Laskar:
A charge-pump based 0.35µm CMOS RF switch driver for multi-standard operations.
452-455
- Daryl Van Vorst, Shahriar Mirabbasi:
Low-voltage bulk-driven mixer with on-chip balun.
456-459
Arithmetic & Cryptography Circuits
- Fatemeh Kashfi, Sied Mehdi Fakhraie, Saeed Safari:
A 65nm 10GHz pipelined MAC structure.
460-463
- Wen-Ching Lin, Jun-Hong Chen, Ming-Der Shieh:
A new look-up table-based multiplier/squarer design for cryptosystems over GF(2m).
464-467
- Shen-Fu Hsiao, Ping-Chung Wei, Ching-Pin Lin:
An automatic hardware generator for special arithmetic functions using various ROM-based approximation approaches.
468-471
- Davide De Caro, Nicola Petra, Antonio G. M. Strollo:
A high performance floating-point special function unit using constrained piecewise quadratic approximation.
472-475
- Yan Wang, Chen Shoushun, Amine Bermak:
Novel VLSI implementation of Peano-Hilbert curve address generator.
476-479
Architectures for Image and Video Processing
- Chung-Chi Lin, Ming-Hwa Sheu, Huann-Keng Chiang, Chishyan Liaw, Zeng-chuan Wu:
The efficient VLSI design of BI-CUBIC convolution interpolation for digital image processing.
480-483
- Yongseok Yi, Byung Cheol Song:
A novel CAVLC architecture for H.264 Video encoding at high bit-rate.
484-487
- Arnaldo Azevedo, Cor Meenderinck, Ben H. H. Juurlink, Mauricio Alvarez, Alex Ramírez:
Analysis of video filtering on the cell processor.
488-491
- Jiaying Liu, Zongming Guo:
Efficient intra-4×4 mode decision based on bit-rate estimation in H.264/AVC.
492-495
- Chun-Hung Liu, Oscar C. Au, Peter H. W. Wong, Man Cheung Kung, Shen Chang Chao:
Bit-depth expansion by adaptive filter.
496-499
CAD and Tools for Analog Design I
LDPC Codes
- Yeong-Luh Ueng, Chung-Jay Yang, Zong-Cheng Wu, Chen-Eng Wu, Yu-Lun Wang:
VLSI decoding architecture with improved convergence speed and reduced decoding latency for irregular LDPC codes in WiMAX.
520-523
- Tzu-Chieh Kuo, Alan N. Willson Jr.:
Enhanced delta-based layered decoding of WiMAX QC-LDPC codes.
524-527
- Shu-Cheng Chou, Mong-Kai Ku, Chia-Yu Lin:
Switching activity reducing layered decoding algorithm for LDPC codes.
528-531
- Marcos B. S. Tavares, Emil Matús, Steffen Kunze, Gerhard Fettweis:
A dual-core programmable decoder for LDPC convolutional codes.
532-535
- Sangmin Kim, Gerald E. Sobelman, Hanho Lee:
Adaptive quantization in min-sum based irregular LDPC decoder.
536-539
Nonlinear Systems Analysis
- Roberto Frasca, M. Kanat Camlibel, Izzet Cem Göknar, Luigi Iannelli, Francesco Vasca:
State discontinuity analysis of linear switched systems via energy function optimization.
540-543
- Mark M. Gourary, Sergey G. Rusakov, Sergey L. Ulyanov, Michael M. Zharov, Brian J. Mulvaney, Kiran K. Gullapalli:
Injection locking conditions under small periodic excitations.
544-547
- Riccardo Rovatti, Gianluca Mazzini, Gianluca Setti, Stefano Vitali:
Linear probability feedback processes.
548-551
- Mario di Bernardo, Alessandro di Gaeta, Umberto Montanaro, Stefania Santini:
A comparative study of the new LQ-MCS control on an automotive electro-mechanical system.
552-555
- Abdulmajed Elbkosh, Damian Giaouris, Volker Pickert, Bashar Zahawi, S. Banerjee:
Stability analysis and control of bifurcations of parallel connected DC/DC converters using the monodromy matrix.
556-559
Digitally Enhanced Analog Circuits:
Systems Aspects
- Boris Murmann, Christian Vogel, Heinz Koeppl:
Digitally enhanced analog circuits: System aspects.
560-563
- Bumman Kim, Jangheon Kim, Jinsung Choi, Ildu Kim:
Performance enhancement of linear power amplifier employing digital technique.
564-567
- Khurram Waheed, Robert B. Staszewski:
Mitigation of CMOS device variability in the transmitter amplitude path using Digital RF Processing.
568-571
- Martin Hasler, Gernot Kubin:
Mixed-domain system representation using Volterra series.
572-575
- Guillaume Ferré, Maher Jridi, Lilian Bossuet, Bertrand Le Gal, Dominique Dallet:
A new orthogonal online digital calibration for time-interleaved analog-to-digital converters.
576-579
Process Variations,
Memory & Flip-Flops
- Jungseob Lee, Lin Xie, Azadeh Davoodi:
A Dual-Vt low leakage SRAM array robust to process variations.
580-583
- Michael Wieckowski, Martin Margala:
A portless SRAM Cell using stunted wordline drivers.
584-587
- Chul Soo Kim, Joo-Seong Kim, Bai-Sun Kong, Moon Yongsam, Young-Hyun Jun:
Presetting pulse-based flip-flop.
588-591
- Saleh Abdel-Hafeez, Shadi M. Harb, William R. Eisenstadt:
High speed digital CMOS divide-by-N fequency divider.
592-595
- Daniel Iparraguirre-Cardenas, Jose Luis Garcia-Gervacio, Víctor H. Champac:
A design methodology for logic paths tolerant to local intra-die variations.
596-599
Nano-Devices,
Nano-Circuits & Nano-Architectures
- Venketeshwaran Puthucode, Chunhong Chen:
An experimental study on multi-island structures for single-electron tunneling based threshold logic.
600-603
- Juan Núñez, José M. Quintana, Maria J. Avedillo:
Limits to a correct operation in RTD-based ternary inverters.
604-607
- Huifei Rao, Jie Chen, V. H. Zhao, Woon Tiong Ang, I-Chyn Wey, An-Yeu Wu:
An efficient methodology to evaluate nanoscale circuit fault-tolerance performance based on belief propagation.
608-611
- Tung-Han Tsai, Chin-Lin Chen, Ching-Li Lee, Chua-Chin Wang:
Power-saving nano-scale DRAMs with an adaptive refreshing clock generator.
612-615
- Themistoklis Prodromakis, Christos Papavassiliou, Kostis Michelakis:
Microstrip stepped impedance lowpass filters based on the maxwell-wagner polarization mechanism.
616-619
Encoder Optimization
- Wei Yao, Zhengguo Li, Susanto Rahardja:
Early detection of all-zero block in H.264 with new rate-quantization models.
620-623
- Yifu Zhang, Shunliang Mei, Quqing Chen, Zhibo Chen:
A fast adaptive quantization matrix selection method in H.264/AVC.
624-627
- Jianpeng Dong, Nam Ling:
A model parameter and MAD prediction scheme for h.264 macroblock layer rate control.
628-631
- Wei-Cheng Lin, Chung-Ho Chen:
Avoiding unnecessary frame memory access and multi-frame motion estimation computation in H.264/AVC.
632-635
- Jian Lou, Shan Liu, Anthony Vetro, Ming-Ting Sun:
Complexity and memory efficient GOP structures supporting VCR functionalities in H.264/AVC.
636-639
Event-based Neuromorphic Systems
Wireless Circuits and Systems II
- Mohammad B. Vahidfar, Omid Shoaei:
A CMOS high IIP2 mixer for multi-standard receivers.
656-659
- Sung-Jin Kim, Min-Chang Cho, Joonhyun Park, Kisuk Song, Yul Kim, SeongHwan Cho:
An ultra low power UHF RFID tag front-end for EPCglobal Gen2 with novel clock-free decoder.
660-663
- Muhammad Anis, Reinhard Tielert, Norbert Wehn:
3.1-to-7GHz UWB impulse radio transceiver front-end based on statistical correlation technique.
664-667
- Pui-In Mak, Ka-Hou Ao Ieong, Rui Paulo Martins:
An open-source-input, ultra-wideband LNA with mixed-voltage ESD protection for full-band (170-to-1700 MHz) mobile TV tuners.
668-671
- Luca Antonio De Michele, Wouter A. Serdijn, Gianluca Setti:
A UWB CMOS 0.13µm low-noise amplifier with dual loop negative feedback.
672-675
Arithmetic Circuits
- Kenny Johansson, Oscar Gustafsson, Lars Wanhammar:
Switching activity estimation for shift-and-add based constant multipliers.
676-679
- Jun-Hong Chen, Wen-Ching Lin, Hao-Hsuan Wu, Ming-Der Shieh:
High-speed modular multiplication design for public-key cryptosystems.
680-683
- Erdal Oruklu, Vibhuti B. Dave, Jafar Saniie:
Performance analysis of flagged prefix adders with logical effort.
684-687
- Dongdong Chen, Younhee Choi, Li Chen, Daniel Teng, Khan Wahid, Seok-Bum Ko:
A novel decimal-to-decimal logarithmic converter.
688-691
- Ioannis Kouretas, Charalambos Basetas, Vassilis Paliouras:
Low-power logarithmic number system addition/subtraction and their impact on digital filters.
692-695
Image Filtering
- Arjuna Madanayake, Leonard T. Bruton:
Selective enhancement of space-time broadband spiral-waves using 2D IIR digital filters.
696-699
- I-Hung Khoo, Hari C. Reddy, P. K. Rajan:
Efficient design of delta operator based 2-D IIR filters using symmetrical decomposition.
700-703
- Dmytro Rusanovskyy, Kemal Ugur, Moncef Gabbouj, Jani Lainema:
Video coding with pixel-aligned directional adaptive interpolation filters.
704-707
- Guangtao Zhai, Jianfei Cai, Weisi Lin, Xiaokang Yang, Wenjun Zhang:
Image deringing using quadtree based block-shift filtering.
708-711
- S. M. Mahbubur Rahman, M. Omair Ahmad, M. N. S. Swamy:
Statistical detector for wavelet-based image watermarking using modified GH PDF.
712-715
CAD and Tools for Analog Design II
- Igor Vytyaz, David C. Lee, Un-Ku Moon, Kartikeya Mayaram:
Parameter variation analysis for voltage controlled oscillators in phase-locked loops.
716-719
- Masood ul-Hasan, Yichuang Sun, Xi Zhu, James Moritz:
Oscillation-based DFT for second-order OTA-C filters.
720-723
- Rui Santos-Tavares, Nuno F. Paulino, José Higino, João Goes, Joáo P. Oliveira:
Optimization of multi-stage amplifiers in deep-submicron CMOS using a distributed/parallel genetic algorithm.
724-727
- Michael M. Green, Marcelo B. Pisani, Catherine Dehollain:
Design methodology for CMOS distributed amplifiers.
728-731
- Amal Kumar Kundu, I. Kharagpur, Tathagato Rai Dastidar, Tarun Kanti Bhattacharyya, Partha Ray:
A methodology for efficient design of analog circuits using an automated simulation based synthesis tool.
732-735
Turbo,
Trellis & Iterative Decoders
- Cheng-Hung Lin, Chun-Yu Chen, An-Yeu Wu:
Low-power traceback MAP decoding for double-binary convolutional turbo decoder.
736-739
- Yang Liu, Fei Sun, Tong Zhang:
Energy-efficient soft-output trellis decoder design using trellis quasi-reduction and importance-aware clock skew scheduling.
740-743
- Silvia Solda, Daniele Vogrig, Andrea Bevilacqua, Andrea Gerosa, Andrea Neviani:
Analog decoding of trellis coded modulation for multi-level flash memories.
744-747
- Rafal Dlugosz, Vincent C. Gaudet:
Current-mode memory cell with power down phase for discrete time analog iterative decoders.
748-751
- Chih-Hao Liu, Chien-Ching Lin, Hsie-Chia Chang, Chen-Yi Lee, Yarsun Hsua:
Multi-mode message passing switch networks applied for QC-LDPC decoder.
752-755
Analysis of Chaotic Systems
- Selçuk Kilinç, Mustak E. Yalcin, Serdar Özoguz:
Synchronization of first-order time-delay systems generating n-scroll chaotic attractors.
756-759
- Tommaso Addabbo, Ada Fort, Santina Rocchi, Valerio Vignoli:
An efficient and accurate method for computing the invariant measure of piecewise affine chaotic maps.
760-763
- Zbigniew Galias, Warwick Tucker:
Rigorous study of short periodic orbits for the Lorenz system.
764-767
- Simin Yu, Wallace Kit-Sang Tang, Jinhu Lu, Guanrong Chen:
Multi-wing butterfly attractors from the modified Lorenz systems.
768-771
- Ying Liu, Wallace Kit-Sang Tang, Hong Sze Kwok:
Formulation and analysis of high-dimensional chaotic maps.
772-775
Advanced Nanoscale Integrated Circuit Technologies
Computational Blocks
- Bipul Chandra Paul, Shinobu Fujita, Masaki Okajima:
ROM based logic (RBL) design: High-performance and low-power adders.
796-799
- Takayuki Onishi, Takashi Sano, Koyo Nitta, Mitsuo Ikeda, Jiro Naganuma:
Multi-reference and multi-block-size motion estimation with flexible mode selection for professional 4: 2: 2 H.264/AVC encoder LSI.
800-803
- Tzu-Yuan Kuo, Jinn-Shyan Wang:
A low-voltage latch-adder based tree multiplier.
804-807
- Ravi Kumar Satzoda, Ramya Muralidharan, Chip-Hong Chang:
Programmable LSB-first and MSB-first modular multipliers for ECC in GF(2m).
808-811
- Tsung-Hsien Tsai, Nelson Yen-Chung Chang, Tian-Sheuan Chang:
Data reuse analysis of local stereo matching.
812-815
Reliability Issues in Nano-technology SOC & Applications
- Paolo Maffezzoni, Lorenzo Codecasa, Dario D'Amore, Mauro Santomauro:
Semi-implicit integration method for the time-domain simulation of thermal responses.
816-819
- Ming-Dou Ker, Tzu-Ming Wang, Hung-Tai Liao:
2xVDD-tolerant crystal oscillator circuit realized with 1xVDD CMOS devices without gate-oxide reliability issue.
820-823
- David Barnhart, Tanya Vladimirova, Martin Sweeting:
Design of self-powered wireless system-on-a-chip sensor nodes for hostile environments.
824-827
- Peter Glösekötter, Ulrich Greveler, Gilson I. Wirth:
Device degradation and resilient computing.
828-831
- Qiaoyan Yu, Paul Ampadu:
Adaptive error control for reliable systems-on-chip.
832-835
Picture Coding Hardware
- Ching-Yi Chen, Guan-Lin Wu, Shao-Yi Chien:
Hardware-oriented image inpainting for perceptual I-frame error concealment.
836-839
- Jianjun Li, Majid Ahamdi:
Realizing high throughput transforms of H.264/AVC.
840-843
- Yiqing Huang, Satoshi Goto, Takeshi Ikenaga:
VLSI friendly computation reduction scheme in H.264/AVC motion estimation.
844-847
- Yuichiro Murachi, Kusuke Mizuno, Junichi Miyakoshi, Masaki Hamamoto, Takahiro Iinuma, Tomokazu Ishihara, Fang Yin, Jangchung Lee, Tetsuya Kamino, Hiroshi Kawaguchi, Masahiko Yoshimoto:
A sub 100 mW H.264/AVC MP@L4.1 integer-pel motion estimation processor VLSI for MBAFF encoding.
848-851
- Chih-Hung Li, Wen-Hsiao Peng, Tihao Chiang:
A reconfigurable video embedding transcoder based on H.264/AVC: Design tradeoffs and analysis.
852-855
Neural Network Circuits & Systems
Analog Modeling & Simulation
Continuous-time Filters III
- Juan M. Carrillo, J. Francisco Duque-Carrillo, Guido Torelli:
1-V continuously tunable CMOS bulk-driven transconductor for Gm-C filters.
896-899
- Xi Zhu, Yichuang Sun, James Moritz:
A CMOS 750MHz fifth-order continuous-time linear phase lowpass filter with gain boost.
900-903
- Alexander J. Casson, Esther Rodríguez-Villegas:
An inverse filter realisation of a single scale Inverse continuous wavelet transform.
904-907
- Jordan D. Gray, Venkatesh Srinivasan, Ryan W. Robucci, Paul E. Hasler:
A floating-gate transistor based continuous-time analog adaptive filter.
908-911
- Trinidad Sanchez-Rodriguez, Clara Isabel Lujan-Martinez, Ramón González Carvajal, Jaime Ramírez-Angulo, Antonio J. López-Martín:
A CMOS linear tunable transconductor for continuous-time tunable Gm-C filters.
912-915
Wireless Circuits and Systems III
VLSI for Communications
Communications Architectures
- Laurent Boher, Rodrigue Rabineau, Maryline Hélard:
Analysis of CORDIC-based triangularization for MIMO MMSE filtering.
948-951
- T. K. Shahana, Babita R. Jose, Rekha K. James, K. Poulose Jacob, Sreela Sasi:
Dual-mode RNS based programmable decimation filter for WCDMA and WLANa.
952-955
- Li Qing, Xiaoyang Zeng, Wu Chuan, Zhang Yulong, Yunsong Deng, Jun Han:
Optimal frame synchronization for DVB-S2.
956-959
- Minhyeok Shin, Hanho Lee:
A high-speed four-parallel radix-24 FFT/IFFT processor for UWB applications.
960-963
Receiver Circuits
- Hong-Yu Yang, Yo-Sheng Lin, Chi-Chen Chen, S. S. Wong:
A low-power V-band CMOS low-noise amplifier using current-sharing technique.
964-967
- Baoyong Chi, Chun Zhang, Zhihua Wang:
Bandwidth extension for ultra-wideband CMOS low-noise amplifiers.
968-971
- Josef Zipper, Gernot Hueber, Andreas Holm:
A single-chip UMTS receiver with integrated digital frontend in 0.13 µm CMOS.
972-975
- Laura Moreno, Didac Gomez, Jose Luis Gonzalez, Diego Mateo, Xavier Aragonès, Roc Berenguer, Héctor Solar:
A low-power RF front-end for 2.5 GHz receivers.
976-979
- Chen-Yuan Chu, Chien-Cheng Wei, Hui-Chen Hsu, Shu-Hau Feng, Wu-Shiung Feng:
A 24GHz low-power CMOS receiver design.
980-983
VCOs for Wireless Communications
Algorithms & Architectures for Communications
- Quan Yuan, Haigang Yang, Fang-yuan Dong, Tao Yin:
"Time borrowing" technique for design of low-power high-speed multi-modulus prescaler in frequency synthesizer.
1004-1007
- Mohammed Berhea, Chunhong Chen, Q. M. Jonathan Wu:
Protocol-level performance analysis for anti-collision protocols in RFID systems.
1008-1011
- Yong-Je Goo, Hanho Lee:
Two bit-level pipelined viterbi decoder for high-performance UWB applications.
1012-1015
- Till Kuendiger, Fang Chen, Leonard MacEachern, Samy A. Mahmoud:
A novel digitally controlled low noise ring oscillator.
1016-1019
- Seong-Hyun Jang, Sang-Hun Yoon, Jong-Wha Chong:
A new packet detection algorithm for IEEE 802.15.4a DBO-CSS in AWGN channel.
1020-1023
Live Demonstration of Circuits & Systems I
- Liwei Guo, Oscar C. Au, Mengyao Ma, Peter H. W. Wong:
Video decoder embedded with temporal LMMSE denoising filter.
1024-1027
- Viktor Gruev, Jan Van der Spiegel, Nader Engheta:
Image sensor with focal plane polarization sensitivity.
1028-1031
- Raphael Berner, Patrick Lichtsteiner, Tobi Delbrück:
Self-timed vertacolor dichromatic vision sensor for low power pattern detection.
1032-1035
- Rico Moeckel, Roger Jaeggi, Shih-Chii Liu:
Steering with an aVLSI motion detection chip.
1036-1039
- Leonardo Gasparini, Marco De Nicola, Nicola Massari, Massimo Gottardi:
A micro-power asynchronous contrast-based vision sensor wakes-up on motion.
1040-1043
Live Demonstration of Circuits & Systems II
- Angel Jiménez-Fernandez, Rafael Paz-Vicente, Manuel Rivas, Alejandro Linares-Barranco, Gabriel Jiménez, Antón Civit:
AER-based robotic closed-loop control system.
1044-1047
- Garrick Orchard, Alexander Russell, Kevin Mazurek, Francesco Tenore, Ralph Etienne-Cummings:
Configuring silicon neural networks using genetic algorithms.
1048-1051
- Mel Ho, Pantelis Georgiou, Suket Singhal, Nick Oliver, Chris Toumazou:
A bio-inspired closed-loop insulin delivery based on the silicon pancreatic beta-cell.
1052-1055
- Rafael Paz-Vicente, Angel Jiménez-Fernandez, Alejandro Linares-Barranco, Gabriel Jiménez-Moreno, Francisco Gomez-Rodriguez, Lourdes Miro-Amarante, Anton Civit-Ballcels:
Image convolution using a probabilistic mapper on USB-AER board.
1056-1059
- John G. Harris, Jie Xu, Manu Rastogi, Alexander Singh-Alvarado, Vaibhav Garg, Jose C. Principe, Kalyana Vuppamandla:
Real time signal reconstruction from spikes on a digital signal processor.
1060-1063
Live Demonstration of Circuits & Systems III
- Zhengming Fu, Eugenio Culurciello:
A 1.2mW CMOS temporal-difference image sensor for sensor networks.
1064-1067
- Brian Ferguson, Jeff Kissinger, Vaibhav Vaidya, Denise Wilson, Karl Booksh, John Cranney, Bill Largen:
A novel refractometer architecture.
1068-1071
- Mostafa Mohamed, Brinda Prasad, Wael M. Badawy:
High throughput quantification system for egg populations in caenorhabditis elegans.
1072-1075
- Eric K. C. Tsang, Stanley Y. M. Lam, Yicong Meng, Bertram Emil Shi:
Neuromorphic implementation of active gaze and vergence control.
1076-1079
- Nicole M. Nelson, David Sander, Marc Dandin, Anshu Sarje, Somashekar Prakash, Honghao Ji, Pamela Abshire:
A handheld fluorometer for measuring cellular metabolism.
1080-1083
Live Demonstration of Circuits & Systems IV
Biomedical Sensors & Systems
- Chin-Teng Lin, Hong-Zhang Lin, Tzai-Wen Chiu, Chih-Feng Chao, Yu-Chieh Chen, Sheng-Fu Liang, Li-Wei Ko:
Distraction-related EEG dynamics in virtual reality driving simulation.
1088-1091
- Clyde Clarke, D. Carl White, Ralph Etienne-Cummings:
Finite element modeling of tissue for optimal ultrasonic transducer array design.
1092-1095
- Nizar Lajnef, Shantanu Chakrabartty, Niell Elvin:
Calibration and characterization of self-powered floating-gate sensor arrays for long-term fatigue monitoring.
1096-1099
- Marianna Beiderman, Terence Tam, Alexander Fish, Graham A. Jullien, Orly Yadid-Pecht:
A Low noise CMOS image sensor with an emission filter for fluorescence applications.
1100-1103
Biomedical Systems & Signal Processing
Digital Filters
Adaptive Filtering
Discrete Transforms
Digital Signal Processing
- Nari Tanabe, Toshihiro Furukawa, Hideaki Matsue, Shigeo Tsujii:
Kalman filter for robust noise suppression in white and colored noises.
1172-1175
- Shaohua Zhao, Shing Chow Chan:
A novel algorithm for mobile station location estimation with none line of sight error using robust least M-estimation.
1176-1179
- Gabriele Bunkheila, Raffaele Parisi, Aurelio Uncini:
Model order selection for estimation of Common Acoustical Poles.
1180-1183
- Yifan Wu, Behrouz Nowrouzian:
A novel technique for the design and DCGA optimization of bilinear-LDI lattice-based digital IF filters.
1184-1187
- Erkka Laulainen, Lauri Koskinen, Marko Kosunen, Kari Halonen:
Compass tilt compensation algorithm using CORDIC.
1188-1191
Digital Design & Test
- Yuko Hara, Hiroyuki Tomiyama, Shinya Honda, Hiroaki Takada, Katsuya Ishii:
CHStone: A benchmark program suite for practical C-based high-level synthesis.
1192-1195
- Rodrigo Jaramillo-Ramirez, Javid Jaffari, Mohab Anis:
Variability-aware design of subthreshold devices.
1196-1199
- Hsin-Hsiung Huang, Hui-Yu Huang, Yu-Cheng Lin, Tsai-Ming Hsieh:
Timing-driven obstacles-avoiding routing tree construction for a multiple-layer system.
1200-1203
- Chunchen Liu, Ruei-Xi Chen, Jichang Tan, Sharon Fan, Jeffrey Fan, Kia Makki:
Thermal aware clock synthesis considering stochastic variation and correlations.
1204-1207
Sigma-Delta Converters I
- Nitz Saputra, Michiel A. P. Pertijs, Kofi A. A. Makinwa, Johan H. Huijsing:
Sigma delta ADC with a dynamic reference for accurate temperature and voltage sensing.
1208-1211
- Omid Rajaee, Un-Ku Moon:
Enhanced multi-bit delta-sigma modulator with two-step pipeline quantizer.
1212-1215
- Nima Maghari, Un-Ku Moon:
Multi-loop efficient sturdy MASH delta-sigma modulators.
1216-1219
- Erkan Bilhan, Franco Maloberti:
A Wide-band 2-path cross-coupled sigma delta ADC.
1220-1223
- Hing-Kit Kwan, Siu-Hong Lui, Chi-Un Lei, Yansong Liu, Ngai Wong, Ka-Leung Ho:
Design of hybrid continuous-time discrete-time delta-sigma modulators.
1224-1227
Low Power Design Techniques
Digital Signal Processing for Communications
Circuit Theory
Wireless Communications Circuits I
- Saul Rodriguez, Ana Rusu, Li-Rong Zheng, Mohammed Ismail:
Digital calibration of gain and linearity in a CMOS RF mixer.
1288-1291
- Ming-Dou Ker, Chun-Yu Lin, Guo-Xuan Meng:
ESD protection design for fully integrated CMOS RF power amplifiers with waffle-structured SCR.
1292-1295
- Chao Lu, Olivier Charlon, Mark Bracey, Anh-Vu H. Pham:
Integrated balun design for dual-band WLAN a/b/g applications.
1296-1299
- Andrea Bevilacqua, Matteo Camponeschi, Marc Tiebout, Andrea Gerosa, Andrea Neviani:
Design of broadband inductorless LNAs in ultra-scaled CMOS technologies.
1300-1303
- Adrian Tang, Fei Yuan, Eddie Law:
A new WiMAX sigma-delta modulator with constant-Q active inductors.
1304-1307
Modeling & Simulation of Nonlinear Systems
Nonnegative Matrix & Tensor Factorization & Related Problems
Array Circuits
- Mingjie Lin, Steve Ferguson, Yaling Ma, Timothy Greene:
HAFT: A hybrid FPGA with amorphous and fault-tolerant architecture.
1348-1351
- Wu Jigang, Thambipillai Srikanthan, Kai Wang:
Finding minimum interconnect sub-arrays in reconfigurable VLSI arrays.
1352-1355
- Mayur Bubna, Naresh Shenoy, Santanu Chattopadhyay:
An efficient greedy approach to PLA folding.
1356-1359
- Scott Miller, Mihai Sima, Michael McGuire:
VLSI implementation of a shift-enabled reconfigurable array.
1360-1363
- Luiz Carlos Gouveia, Thomas Jacob Koickal, Alister Hamilton:
An asynchronous spike event coding scheme for programmable analog arrays.
1364-1367
Cellular Nonlinear Networks:
Theory & Applications
- Mauro Di Marco, Mauro Forti, Massimo Grazzini, Luca Pancioni:
A study on global robust stability of delayed full-range cellular neural networks.
1368-1371
- Michele Bonnin, Fernando Corinto, Marco Gilli, Pier Paolo Civalleri:
Waves and patterns in delayed oscillatory networks.
1372-1375
- Henry M. D. Ip, Emmanuel M. Drakakis, Anil A. Bharath:
A nonseparable 3D spatiotemporal bandpass filter with analog networks.
1376-1379
- Fernando Corinto, Valentina Lanza, Marco Gilli:
Spiral waves in bio-inspired oscillatory media.
1380-1383
- Mitra Mirhassani, Majid Ahmadi, Graham A. Jullien:
Robust analog neural network based on continuous valued number system.
1384-1387
Visual Signal Coding I
- Mauro Tiziani, Nicola Massari, Syed A. Jawed, Massimo Gottardi:
A self-adapting high dynamic-range visual representation algorithm for AER imagers.
1388-1391
- Weisheng Dong, Guangming Shi, Jizheng Xu:
Signal-adapted directional lifting scheme for image compression.
1392-1395
- Yu Liu, King Ngi Ngan, Feng Wu:
3-D direction aligned wavelet transform for scalable video coding.
1396-1399
- Sang-Tae Na, Kwan-Jung Oh, Cheon Lee, Yo-Sung Ho:
Multi-view depth video coding using depth view synthesis.
1400-1403
- Xiaopeng Fan, Oscar C. Au, Yan Chen, Jiantao Zhou, Mengyao Ma:
Bidirectionally decodable Wyner-Ziv video coding.
1404-1407
Low Power Smart CMOS Image Sensors & Beyond
Sigma-Delta Converters II
Low Power Circuits
- Enrico Dallago, Daniele Miatton, Giuseppe Venchi, Valeria Bottarel, Giovanni Frattini, Giulio Ricotti, Monica Schipani:
Active self supplied AC-DC converter for piezoelectric energy scavenging systems with supply independent bias.
1448-1451
- Sherif A. Tawfik, Volkan Kursun:
Low power and robust 7T dual-Vt SRAM circuit.
1452-1455
- Siegfried Dossou, Nicolas Abelé, Etienne César, Pascal Ancey, Jean-François Carpentier, Pierre Vincent, Jean-Michel Fournier:
60µW SMR BAW oscillator designed in 65nm CMOS technology.
1456-1459
- Md. Ibrahim Faisal, Magdy A. Bayoumi:
A low-area, low-power programmable frequency multiplier for DLL based clock synthesizers.
1460-1463
- Michael A. Turi, José G. Delgado-Frias:
High-performance low-power AND and Sense-Amp address decoders with selective precharging.
1464-1467
Digital Signal Processing Implementation
- Chun-Nan Liu, Jui Hong Hung, Tsung-Han Tsai:
Optimization techniques of AAC decoder on PACDSP VLIW processor.
1468-1471
- Yu-Ting Kuo, Tay-Jyi Lin, Wei-Han Chang, Yueh-Tai Li, Chih-Wei Liu, Shuenn-Tsong Young:
Complexity-effective auditory compensation for digital hearing aids.
1472-1475
- Walid Atabany, Patrick Degenaar:
Parallelism to reduce power consumption on FPGA spatiotemporal image processing.
1476-1479
- Stephen Pfetsch, Tamer Ragheb, Jason N. Laska, Hamid Nejati, Anna C. Gilbert, Martin Strauss, Richard G. Baraniuk, Yehia Massoud:
On the feasibility of hardware implementation of sub-Nyquist random-sampling based analog-to-information conversion.
1480-1483
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