Stamatis Vassiliadis, Jean-Luc Gaudiot, Vincenzo Piuri (Eds.):
Proceedings of the First Conference on Computing Frontiers, 2004, Ischia, Italy, April 14-16, 2004.
ACM 2004, ISBN 1-58113-741-9
- Dan C. Marinescu:
Quantum parallelism and the exact simulation of physical systems.
1
Software Environments
Special Session on NOMADS
Pervasive Computing
Quantum Computing
Computational Models
Special Session on Memory Wall
- Sally A. McKee:
Reflections on the memory wall.
162
- Michel Dubois:
Fighting the memory wall with assisted execution.
168-180
- Martin Kämpe, Per Stenström, Michel Dubois:
Self-correcting LRU replacement policies.
181-191
- Ben H. H. Juurlink, Pepijn J. de Langen:
Dynamic techniques to reduce memory traffic in embedded systems.
192-201
- Antonis Papanikolaou, Miguel Miranda, Francky Catthoor:
Overcoming the "Memory Wall" by improved system design exploration and a link to process technology options.
202-211
- Marco Galluzzi, Valentin Puente, Adrián Cristal, Ramón Beivide, José-Ángel Gregorio, Mateo Valero:
A first glance at Kilo-instruction based multiprocessors.
212-221
Cache
Power Awareness
Networks
Clusters
Applications
Pipelined Architectures
Special Session on Reconfigurable Computing
- Reiner W. Hartenstein:
The digital divide of computing.
357-362
- Ingrid Verbauwhede, Patrick Schaumont:
The happy marriage of architecture and application in next-generation reconfigurable systems.
363-376
- Manfred Glesner, Thomas Hollstein, Leandro Soares Indrusiak, Peter Zipf, Thilo Pionteck, Mihail Petrov, Heiko Zimmer, Tudor Murgan:
Reconfigurable platforms for ubiquitous computing.
377-389
- Ricardo Reis, Fernanda Lima Kastensmidt, José Luís Almada Güntzel:
Physical design methodologies for performance predictability and manufacturability.
390-397
- Dirk Koch, Jürgen Teich:
Platform-independent methodology for partial reconfiguration.
398-403
- Tudor Murgan, Mihail Petrov, Mateusz Majer, Peter Zipf, Manfred Glesner, Ulrich Heinkel, Jörg Pleickhardt, Bernd Bleisteiner:
Adaptive architectures for an OTN processor: reducing design costs through reconfigurability and multiprocessing.
404-418
- Fernanda Lima Kastensmidt, Gustavo Neuberger, Luigi Carro, Ricardo Reis:
Designing and testing fault-tolerant techniques for SRAM-based FPGAs.
419-432
Processors
- Francisco J. Cazorla, Peter M. W. Knijnenburg, Rizos Sakellariou, Enrique Fernández, Alex Ramírez, Mateo Valero:
Predictable performance in SMT processors.
433-443
- Cecilia Metra, T. M. Mak, Martin Omaña:
Fault secureness need for next generation high performance microprocessor design for testability structures.
444-450
- X. H. Xu, C. T. Clarke, S. R. Jones:
High performance code compression architecture for the embedded ARM/THUMB processor.
451-456
- Rahul Nagpal, Y. N. Srikant:
Integrated temporal and spatial scheduling for extended operand clustered VLIW processors.
457-470
Accelerators
Architectures
- Predrag T. Tosic:
A perspective on the future of massively parallel computing: fine-grain vs. coarse-grain parallel models comparison & contrast.
488-502
- Teng Wang, Zhenghua Qi, Csaba Andras Moritz:
Opportunities and challenges in application-tuned circuits and architectures based on nanodevices.
503-511
Copyright © Mon Nov 2 20:23:53 2009
by Michael Ley (ley@uni-trier.de)